System States and their Names

In terms of power control of µT-Engine, system state and naming shall be specified as follows.

Name: P0
State: Main power OFF

Name: P1
State: Main power ON, CPU sleep (startup by interruption available), no memory retained, peripheral modules optional

Name: P2
State: Main power ON, CPU sleep (startup by interruption available), memory retained, peripheral modules optional

Name: P3
State: Main power ON, CPU activated, memory retained, peripheral modules optional

More detailed naming convention shall be specified when CPU of P3 is activated.

The lowest clock frequency that the CPU can set shall be “1” and the highest frequency shall be the maximum value.

Example:

  • Low speed: P3-1
  • Middle speed: P2-2
  • High speed: P3-3

  • Comments